For immediately’s weblog put up, Veer Alakshendra is happy to welcome Joel Flückiger and Lucas Gibson from the AMZ Racing Method Scholar group. Joel and Lucas will likely be discussing the motor controller design that helped their group set a brand new world report for electrical automobile acceleration.
Who Are We
As a part of the Method Scholar group, AMZ builds a brand new prototype race automobile from scratch yearly, to participate in worldwide competitions the place the automobile’s efficiency, design and monetary planning are totally evaluated. Younger engineers from universities internationally meet, share concepts and push one another to construct the absolute best race automobile.
On this weblog put up, we’ll concentrate on one a part of the automobile significantly, the inverter, or extra particularly, the motor management algorithm and its implementation. We’ll go over how we laid out our targets and why we determined to implement a customized resolution for the inverter software program. Moreover, we’ll focus on what kind of difficulties we confronted, how we solved them and attainable future design steps we’d take to enhance the general design of the controller.
What Motivated Us to Break the Earlier File
With the aim of constructing our first world report try in summer time 2023 the time strain was on. Therefore, we focussed on the next targets:
Determine 1
Maximize efficiency at 100 km/h: Constructing on earlier generations of inverters, we noticed the potential for enchancment. To maximise efficiency, we determined to revamp the motor controller from scratch, guaranteeing an intensive understanding of its implementation and tuning whereas reusing the remainder of the interface of the present inverter software program. This strategy would save time through the summer time commissioning with the Digital Management Unit (ECU) and the automobile.
Initially, we outlined the inverter’s design utilizing mathematical fashions. Simulating a bodily mannequin of the electrical prototype race automobile, we recognized torque sensitivities, setting targets of 20 Nm for the entrance axis and 40 Nm for the rear wheels. To succeed in 100 km/h in 1.2 seconds, the prototype required about 200 kW. Secure management as much as 28,000 RPM was important as a result of our motors’ small and light-weight design.
Preserve accessibility for future use by the group members: AMZ’s founding precept is to supply college students an area to push boundaries, discover new concepts, and improve their expertise by way of challenges. Emphasizing data switch, our controller wanted to realize report efficiency to achieve 100 km/h swiftly, whereas remaining accessible for future college students to make use of and modify.
Determine errors and safeguard the {hardware}: A lot of the event centered on environment friendly error detection and {hardware} safety by way of simulation and testing. Utilizing MATLAB® and Simulink®, we designed a customized mannequin to precisely simulate management set factors, implement testing modes, and create a modular construct. This strategy ensured that the system might be simply understood and modified by future AMZ college students.
Our Methodology
Determine 2 supplies a high-level overview of our strategy. To maintain this weblog concise, we’ll delve into particular features of our methodology, specializing in the modelling of the inverter, motor, and motor controller, in addition to the {hardware} implementation.
Determine 2
Inverter Software program Overview
To know the strategy, we took when designing the controller, we have to take a step again and evaluation the final construction of the inverter software program in AMZ. The software program runs on a Zynq7000 System on Chip (SoC) module. This module encompasses a ARM® dual-core Cortex™-A9 and a Subject Programmable Gate Array (FPGA).
This provides us the choice to implement customary duties like ethernet communication with the ECU, high-level fault checking and information logging in C code on the processors.
Moreover, the slower velocity management loop and area weakening calculations are additionally executed on the processors. The present controller that we designed for the world report, which runs at a roughly 5 instances larger frequency than the velocity controller, is carried out on the FPGA.
Determine 3
FPGA design is an extremely complicated matter and may simply develop into complicated. The design is carried out utilizing a {hardware} description language (HDL), which is considerably completely different from programming languages and toolchains offered by the producers. For the Zynq, this may be the AMD design move.
Determine 4
Motor Management
Now to the enjoyable half, the motor controller. Subject Oriented Control is a management algorithm, typically utilized in trade to regulate machines like a everlasting magnet synchronous motor (PMSM). It depends on the coordinate transforms (Clarke and Park transformations) which convert the three-phase stator currents into the d-q reference body aligned with the rotor flux. Because it has sturdy management efficiency and deterministic switching traits, it was well-suited for the world report try and in addition meant that it might be used for the AMZ inverter in future components pupil competitions.
Determine 5: Overview of FOC [1]
The beforehand carried out management algorithm operating on the AMZ inverters was an adaption of Direct Torque Management (DTC). In contrast to Subject Oriented Management (FOC), which makes use of PI controllers to regulate the direct present id and quadrature present iq to control the motor efficiency, DTC immediately controls the motor torque and flux utilizing a hysteresis-based controller also called bang-bang management. Like FOC it is usually attainable to weaken the sector, the place preferrred torque circumstances are sacrificed to achieve larger rotor speeds. This controller gives an easier implementation of the particular present controller than FOC (hysteresis vs PI controller) with a really dynamic response to reference values. Nonetheless, for us, it got here at the price of extremely unpredictable switching traits of the semiconductor modules and better torque ripple which we needed to keep away from within the closing motor management.
Traction Management
For optimum traction management, our major aim was to realize a clear and significantly low-latency car velocity measurement. To perform this, we utilized the Kistler SF-Movement outfitted with a further IMU, updating the velocity sign by way of a Kalman filter at 500 Hz on the Speedgoat unit. To maximise acceleration utilizing easy calculations, we leveraged our present data of tires and carried out check runs to handle the specified tire slip ratio successfully. Consequently, three indicators have been transmitted from the ECU to the inverter: one for torque reference and two for motor speeds, defining the permissible motor velocity vary. This setup allowed the motor to function inside a specified torque reference so long as the motor velocity remained inside this vary, comparable to the tire slip ratio. Extreme tire slippage, indicated by motor speeds falling outdoors this vary, triggered the inverter to shift from torque to hurry management, utilizing the band restrict as a reference.
Overview of Simulink® Mannequin
Having determined which motor management technique we needed to make use of, we began constructing a golden reference mannequin in Simulink® which might set a basis upon which we might construct as we progressed additional into the event of and deployment of the controller on {hardware}.
Moreover, the golden reference was a computationally environment friendly mannequin geared toward verifying fundamental functionalities at a excessive degree. This allowed for fast simulation outcomes and straightforward verification of the mannequin by merely defining a set level we needed to trace after which checking the outcomes of the simulation. Whereas this mannequin in the end just isn’t a essential step within the code technology and deployment on the FPGA, we noticed it as a essential step within the growth course of. Solely as soon as we have been proud of the efficiency of our golden reference mannequin, did we begin implementing the model we’d use for the HDL code technology. This saved us a big period of time throughout debugging.
The three-phase inverter mannequin consisted of straightforward blocks like MOSFETS, resistors, capacitors and voltage sources. Different parts we utilized in our {hardware} mannequin included the battery, PMSM and Encoder.
Determine 6: Inverter subsystem
Determine 7: Motor, inverter, and battery subsystem
Determine 8: Motor controller subsystem
{Hardware} Implementation
This toolchain permits for the interpretation of conceptual designs in Simulink® into useful {hardware} that may be deployed on the FPGA. Simulink®’s user-friendly graphical interface significantly simplifies the design course of, permitting for intuitive modelling of the system structure utilizing interconnected blocks. It’s then attainable to fine-tune the Mannequin Composer settings to align with the goal FPGA specs and synthesis preferences. After that, the Mannequin Composer interprets the Simulink® mannequin into HDL code, making ready it for synthesis and implementation onto the goal FPGA gadget.
Determine 9: Mannequin with Simulink® blocks
Determine 10: Simulink® mannequin with AMD blocks
Because of the seamless swap between AMD and Simulink® golden mannequin variants, we have been in a position to shortly detect minor errors as quickly as attainable each time we created a brand new AMD variant for a subsystem. These minor errors would have been extraordinarily arduous to search out if we began constructing the entire AMD FOC mannequin and solely in contrast the consequence to the golden mannequin, as a substitute of checking the simulation outcomes of every particular person subsystem.
Consequently, when producing HDL code for the whole controller, we merely needed to join all of the AMD variant subsystems in a single mannequin and confirm that the ultimate model of the AMD controller exhibited the identical behaviour because the golden reference controller.
Efficiency Testing – Commissioning and Information
Testing the brand new Controller on {hardware} commenced with verifying the Bridge Leg Timing (BLT) on the finish of the management scheme. It was essential to substantiate the accuracy of the inserted lifeless time on the {hardware}. If each a excessive gate and a low gate are switched on on the similar time, the consequence might be a catastrophic failure if it isn’t prevented by the {hardware} safety. The verification was carried out by injecting a hardcoded sine wave into the PWM service and analyzing the ensuing switching patterns utilizing the Built-in Logic Analyzer offered by AMD (Determine 11).
Determine 11: Useless time validation at a switching frequency of fifty kHz, 50% responsibility cycle and a lifeless time of 350 nano seconds.
Determine 12: Intersection of the sinusoidal voltage reference and the PWM service wave (high) leads to the switching states (backside).
The PWM service frequency was set to 50 kHz, derived from the best revolutions per minute offered by the PMSM, which was 28,000. Multiplying this by the variety of pole pairs and dividing by 60 yielded the best frequency of the sine waves required for sinusoidal PWM. As a rule of thumb, we needed our service frequency to be 10x quicker than our reference sign. By introducing a security issue of two we ensured a clear sine-wave output, leading to a switching frequency of roughly 50 kHz (Determine 12).
As soon as the integrity of each the modulator and the lifeless time insertion was confirmed, we wanted to validate the PI controllers used for the quadrature and direct currents. The controllers’ performance was assessed by making use of mounted present step values and observing the inverter’s output response. Each 5 A and 10 A present steps for id and iq have been examined (Determine 13).
Determine 13: Q-current step response of the PI controller for a ten A step.
Determine 14: Velocity controller step response for a mechanical reference velocity of 3000 rpm to confirm the controller performance. The measured quadrature present and its reference present details about the inside present management loop.
Following the profitable validation of the present steps, we carried out each area weakening and the velocity controller on the ARM cores. The velocity controller was a easy implementation of a PI controller in C, operating at roughly 10 kHz. This allowed us to run varied check profiles on our testbench, the place we drove one motor with a sure torque, and set the opposite controller to a sure velocity set level in the wrong way. Determine 14 reveals the profitable implementation of the controller.
After verification of the velocity controller, we needed to verify we accurately calculated and utilized the specified quadrature and direct currents at varied energy set factors. To attenuate any dangers throughout commissioning, we ran most checks at a decrease voltage earlier than checking efficiency at larger energy factors.
Determine 15: Verification of field-weakening operation at 100 V DC hyperlink voltage and 5000 rpm mechanical reference velocity.
Determine 16: Controller’s potential at 21.5 Nm.
With the sector weakening, present PI controllers, sinusoidal PWM, and BLT all validated, we needed to begin rising the load and energy to see if there have been any limitations on the {hardware} facet that we hadn’t anticipated.
We needed to tune the assorted positive aspects for preferrred dynamics. By setting a reference step of 10,500 rpm, the controller utilized the utmost torque out there on the check bench of 21.5 Nm. This check’s success demonstrated the controller’s potential to make the most of the complete out there torque and supply sturdy management.
The ultimate step was to evaluate the controller’s habits at most velocity. Using the golden reference Simulink® mannequin, simulations have been carried out to anticipate the ensuing sine waves of the part currents. For this, a easy rpm ramp was fed into the omega controller. The ramp began at zero rpm and regularly elevated to 28000 rpm, the place it maintained its velocity for 3 seconds, after which returned to zero rpm.
With the check yielding profitable outcomes we have been in a position to examine the present measurements made on the {hardware} to the simulation outcomes of our golden reference mannequin in Simulink®. This allowed us to affirm the accuracy of each the golden reference Simulink® mannequin and the simulation developed for the design of the FOC management algorithm. Having these instruments out there and a comparatively sensible illustration of our {hardware} allowed us to make a tough estimate of the PI controller positive aspects we must always use and save essential time throughout testing on the monitor.
Determine 17: Comparability of FOC simulation and {hardware} check.
Our Perspective on the Carried out Methodology
On this phase, we wish to record out our challenges related to AMD based mostly on our expertise:
- We want proficiency in Mannequin Composer, Vivado, and Vitis.
- Lack of expertise in FPGA was one other problem.
- The time required for synthesis and implementation can impede growth progress.
What We Are Engaged on Now
{Hardware} within the loop simulation for traction management
System modeling of energy electronics allows the institution of a hardware-in-the-loop (HIL) simulation atmosphere for traction management. This setup includes using one motor to simulate traction drive and the opposite to characterize the counter torque of the tire.
For implementation, the facility electronics {hardware} and motor management software program should be changed by Ethernet communication to and from the inverter. Furthermore, the mechanical mannequin and its related tire counter-torque are now not essential as this suggestions is realized on the check bench. Determine 19 beneath supplies a high-level overview of the Simulink® implementation as described above.
Determine 19: Doable implementation of the {hardware} within the loop simulation operating on the Speedgoat efficiency.
References
